Intel's Hybrid Big Core Little Core strategy could be a disaster for Alder Lake suggests leak
When the little cores are active, the big cores will be restricted...
Published: 14th July 2020 | Source: @9550pro |
Intel's Hybrid Big Core Little Core strategy could be a disaster for Alder Lake suggests leak
Intel's Alder Lake Core is set to bring the design principles of Lakefield to desktop platforms, offering users hybrid processors with both big cores and little cores. The powerful big cores will provide performance where it is necessary, and the smaller cores will deliver higher performance/watt and supplement the performance of their stronger counterparts in multi-threaded workloads.
With Alder Lake, Intel is reportedly offering consumers processors with eight big cores and eight little cores, offering users sixteen total cores and the potential for a lot of hardware/software headaches. Before we get into this, let's discuss the advantages of Intel's hybrid core designs.
The advantages
In some areas of the PC market, power consumption is everything, especially within the mobile section of the PC space. Hybrid core designs allow high-efficiency "small cores" to be combined with more powerful "big cores" to enable increased performance/watt characteristics. At idle, the small cores can handle most workloads. When more performance is required, the processor's big cores can jump into action, creating a highly responsive PC while also offering users a longer battery life.
Another advantage is that the so-called "small cores" are smaller than their more performant counterparts. These cores will take up less die space than their larger counterparts, allowing Intel to increase their core counts without huge die space costs. That said, this is also a disadvantage for Intel, as we will discuss below.
The Disadvantages
We already know with Lakefield that Intel's hybrid processer have their flaws. With Lakefield, we know that Intel's high-performance Sunny Cove CPU cores lack support for AVX-512 and hyperthreading, cutting down Sunny Cove's feature set to match the low-power Tremont cores that they are paired with.
While Intel's big cores and little cores share the same ISA, that doesn't mean that both sets of cores share the same feature set, and this isn't due to change with Alder Lake.
Based on a slide from JZWSVIC over on the zhihu website (see below image), as uncovered through @9550pro on Twitter, we can see that Alder Lake's big CPU cores will lack AVX-512, Intel TSX-NI and FP16 support when the processor's little cores are enabled.
This strange design quirk will force Intel users to deactivate their small CPU cores to enable support for these hardware features, horribly fragmenting their hardware ecosystem. Intel's lack of support for AVX-512 in the consumer space is already a major sticking point for the company, and it looks like this is set to continue well into the future.
Right now, AVX-512 is available on Intel's Ice Lake mobile processors and the company Skylake-X and Cascade Lake-X series of processors. As of now, no mainstream desktop processors from Intel support AVX-512, preventing any kind of widespread adoption for the feature.
With Alder Lake, Intel is reportedly offering consumers processors with eight big cores and eight little cores, offering users sixteen total cores and the potential for a lot of hardware/software headaches. Before we get into this, let's discuss the advantages of Intel's hybrid core designs.
The advantages
In some areas of the PC market, power consumption is everything, especially within the mobile section of the PC space. Hybrid core designs allow high-efficiency "small cores" to be combined with more powerful "big cores" to enable increased performance/watt characteristics. At idle, the small cores can handle most workloads. When more performance is required, the processor's big cores can jump into action, creating a highly responsive PC while also offering users a longer battery life.
Another advantage is that the so-called "small cores" are smaller than their more performant counterparts. These cores will take up less die space than their larger counterparts, allowing Intel to increase their core counts without huge die space costs. That said, this is also a disadvantage for Intel, as we will discuss below.
The Disadvantages
We already know with Lakefield that Intel's hybrid processer have their flaws. With Lakefield, we know that Intel's high-performance Sunny Cove CPU cores lack support for AVX-512 and hyperthreading, cutting down Sunny Cove's feature set to match the low-power Tremont cores that they are paired with.
While Intel's big cores and little cores share the same ISA, that doesn't mean that both sets of cores share the same feature set, and this isn't due to change with Alder Lake.
Based on a slide from JZWSVIC over on the zhihu website (see below image), as uncovered through @9550pro on Twitter, we can see that Alder Lake's big CPU cores will lack AVX-512, Intel TSX-NI and FP16 support when the processor's little cores are enabled.
This strange design quirk will force Intel users to deactivate their small CPU cores to enable support for these hardware features, horribly fragmenting their hardware ecosystem. Intel's lack of support for AVX-512 in the consumer space is already a major sticking point for the company, and it looks like this is set to continue well into the future.
Right now, AVX-512 is available on Intel's Ice Lake mobile processors and the company Skylake-X and Cascade Lake-X series of processors. As of now, no mainstream desktop processors from Intel support AVX-512, preventing any kind of widespread adoption for the feature.
If this Alder Lake leak is accurate, moving to a hybrid processor design will be a disaster for Intel when it comes to its advanced feature set. Nobody wants to disable CPU cores to enable support for something else. This lack of simplicity is something that will turn-off customers and annoy anyone who wants to utilise AVX-512 instructions.
You can join the discussion on Intel's Hybrid CPU strategy being a potential disaster for Alder Lake on the OC3D Forums.
Most Recent Comments
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Originally Posted by NeverBackDown
Lack of AVX512 isn't a big deal. It's just used for marketing nice benchmarks. It's really only useful for Data Center and HPC. How often are people running insanely floating point critical applications in the consumer space? Especially for a BIG.Little configuration designed for power efficiency over raw compute speed. If you need that much speed, using a GPU is significantly faster.
As for the other instructions, pretty sad Intel has to disable them to use those little cores. Mine as well not include them at that rate. It's funny just the other day I read an article about how Linus Torvalds (Creator of Linux) was talking about how he wants AVX512 to die in consumer space. Kinda got his wish  |
Ice Lake has AVX-512, and the instruction set it important to Intel's AI compute stuff. That said, Linus is right for the most part.
At OC3D, I've only known Tom to use AVX-512 as a stupidly hard OC test for compatible processors. Basically a power virus on the newer versions of Prime95. Get those thermals up to properly stress an OC.
If true, this Alder Lake stuff will make AVX-512 a bigger mess in the consumer market. It's crazy.Quote
It is worth noting that a lot of newer AVX-512 extensions(Further modular extensions to the AVX-512 Foundation x86 extension) are still useful with 256 and 128-bit registers, and could be useful in place of older SSE or AVX/2 implementations that didn't require the actual 512-bit register aspect of AVX-512, and you won't get downclocking from using AVX-512 on these smaller register sizes.
Of course though no one is going to actually use it in these cases with all the fragmentation in support, not just amongst Intel tbf but across the x86 market. But yeah Linus also has a point that these gains aren't practically worth the transistor budget/cost of the units so there's no real reason for AMD to adopt yet, at least not while they're using the same dies across enterprise and consumer desktop.
Disabling FP16 hardware support isn't going to help with adoption there either.Quote
Of course though no one is going to actually use it in these cases with all the fragmentation in support, not just amongst Intel tbf but across the x86 market. But yeah Linus also has a point that these gains aren't practically worth the transistor budget/cost of the units so there's no real reason for AMD to adopt yet, at least not while they're using the same dies across enterprise and consumer desktop.
Disabling FP16 hardware support isn't going to help with adoption there either.Quote
Quote:
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Originally Posted by NeverBackDown
Lack of AVX512 isn't a big deal. It's just used for marketing nice benchmarks. It's really only useful for Data Center and HPC. How often are people running insanely floating point critical applications in the consumer space? Especially for a BIG.Little configuration designed for power efficiency over raw compute speed. If you need that much speed, using a GPU is significantly faster.
As for the other instructions, pretty sad Intel has to disable them to use those little cores. Mine as well not include them at that rate. It's funny just the other day I read an article about how Linus Torvalds (Creator of Linux) was talking about how he wants AVX512 to die in consumer space. Kinda got his wish |
He puts these new features down as Intels way to skew benchmarks in their favour as much as possible.Quote
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Originally Posted by Warchild
Yeah I saw another article where hes said "Intel needs to stop making magical features no one cares about, and start fixing problems we have had from day 1"
He puts these new features down as Intels way to skew benchmarks in their favour as much as possible. |
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As for the other instructions, pretty sad Intel has to disable them to use those little cores. Mine as well not include them at that rate.
It's funny just the other day I read an article about how Linus Torvalds (Creator of Linux) was talking about how he wants AVX512 to die in consumer space.
Kinda got his wish