Maths behind ATI's Teraflop Page: 1 Maths behind ATI's Teraflop
Fudzilla had the pleasure to be able to ask ATI how they got their 1.2 Teraflop figure from the HD4870, below is the result.
RV770 has 800 pixel shaders. Each one of the 800 is able to do a Floating Point Multiply and Accumulate unit (FMAC) and in every cycle each shader can perform a multiply and adder instruction.
Because it can perform both of these operations in one single pass it can be counted as two Floating-Point Operations. The following equations explains the 1.2 Teraflops.
2 (Floating point instructions per processor) x 800 (processors) x 750 (Engine clock in MHz) = 1200 GLFOP = 1.2 TFLOPS.
A little rough if you ask me, discuss on our Forums